DSValidator: An Automated Counterexample Reproducibility Tool for Digital Systems

Lennon C. Chaves, I. Bessa, L. Cordeiro
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引用次数: 4

Abstract

We present an automated counterexample reproducibility tool based on MATLAB, called DSValidator, with the goal of reproducing counterexamples that refute specific properties related to digital systems. We exploit counterexamples generated by the Digital System Verifier (DSVerifier), which is a model checking tool based on satisfiability modulo theories for digital systems. DSValidator reproduces the execution of a digital system, relating its input with the counterexample, in order to establish trust in a verification result. We show that DSValidator can validate a set of intricate counterexamples for digital controllers used in a real quadrotor attitude system within seconds and also expose incorrect verification results in DSVerifier. The resulting toolbox leverages the potential of combining different verification tools for validating digital systems via an exchangeable counterexample format.
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DSValidator:数字系统的自动反例再现工具
我们提出了一个基于MATLAB的自动反例再现工具,称为DSValidator,其目标是再现反驳与数字系统相关的特定属性的反例。我们利用数字系统验证器(DSVerifier)生成的反例,DSVerifier是一种基于数字系统可满足模理论的模型检查工具。DSValidator再现数字系统的执行,将其输入与反例联系起来,以便在验证结果中建立信任。我们表明DSValidator可以在几秒钟内验证真实四旋翼姿态系统中使用的数字控制器的一组复杂反例,并且还会在DSVerifier中暴露不正确的验证结果。由此产生的工具箱利用组合不同验证工具的潜力,通过可交换的反例格式来验证数字系统。
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Session details: Modeling and Verification Algorithms for exact and approximate linear abstractions of polynomial continuous systems Formal Controller Synthesis from Hybrid Programs Session details: Stabilization and Control Design Compositional Synthesis for Symbolic Control
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