A Design for Two-Dimensional Non-Causal Deslauriers-Dubuc Discrete Wavelet Transformation for Real-Time Video Processing on FPGA

M. Hussain, Thi Phuong Loan Hoang, Christian Langen
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引用次数: 4

Abstract

In this paper, an efficient implementation for two-dimensional non-causal Deslauriers-Dubuc discrete wavelet transformation using the lifting scheme for real-time video processing is proposed. Firstly, a two-dimensional discrete Deslauriers-Dubuc wavelet transformation for decomposition with outputs as the approximation, horizontal details, vertical details and diagonal details of the input frames and inverse discrete wavelet transformation for reconstruction of the decomposed video stream is implemented on the Simulink HDL coder platform. The method with FIFO and counter logic provides serial data to the wavelet transform module, which reduces the delay time as compared to the prior approach of the delay line [1]. The implementation addresses the solution for problems related to serial processing by non-causal wavelet filters and delay in the output frame display. Later, the Simulink model is tested on the Terasic Intel/Altera DE2i-150 board and applied to processing of real-time video supplied by a Terasic 5 MPixel digital camera at the rate of 15 frames per second.
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基于FPGA的二维非因果Deslauriers-Dubuc离散小波变换的实时视频处理设计
本文提出了一种基于提升算法的二维非因果deslaurier - dubuc离散小波变换的实时视频处理方法。首先,在Simulink HDL编码器平台上实现了以输出为近似的二维离散Deslauriers-Dubuc小波变换分解输入帧的水平、垂直和对角细节,并对分解后的视频流进行逆离散小波变换重构。FIFO和计数器逻辑的方法为小波变换模块提供串行数据,与延迟线[1]的先前方法相比,减少了延迟时间。该实现解决了非因果小波滤波器串行处理和输出帧显示延迟相关的问题。随后,Simulink模型在Terasic Intel/Altera DE2i-150板上进行了测试,并应用于Terasic 5百万像素数码相机以每秒15帧的速率提供的实时视频处理。
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