Simulation of filter structures for fixed-point implementation

Abstract

We report on the development and performance evaluation of a fixed-point filter simulator for various filter structures and variable wordlength. The simulation models are based on the filter implementation in a Motorola DSP56002 fixed-point DSP. A nonlinear model of DSP56002 multiplier-accumulator including the convergent (unbiased) rounding and saturation is developed. This model is validated by comparison to the actual filter implementation on the DSP56002. These results are also compared to the linear-stochastic rounding noise model and lower bounds. Matlab simulation and automatic scaling routines where developed for the direct form high order, 2nd order cascaded and parallel sections, state-space section optimal, direct form FIR and MA lattice.