{"title":"Advanced mapping techniques for digital signal processors","authors":"T. Fryza, R. Mego","doi":"10.1109/ISSPIT.2016.7886037","DOIUrl":null,"url":null,"abstract":"This paper is focused on the hardware modeling and the algorithms mapping on the digital signal processor (DSP) with the very long instruction word (VLIW) architecture, such as TMS320C6000. The general methods to develop an efficient application for the target processor combine high- and/or low-level programming languages. Although the hardware capabilities of the nowadays processors and compilers are persistently increasing, the programmers common practice is to hand-optimize critical parts of the digital signal processing algorithms in low-level assembly code. In the paper the benefit of the auxiliary tool for generating of semi-optimal codes for the DSP is presented. The functions for basic vector operations (addition, multiplication, and dot product) were proposed by this tool and the computing performances were compared to the corresponding functions from the TMS320C6000 DSP Library (DSPLIB). Comparing the functions' duration, the proposed routines achieve the average acceleration of 24 CPU cycles.","PeriodicalId":371691,"journal":{"name":"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSPIT.2016.7886037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper is focused on the hardware modeling and the algorithms mapping on the digital signal processor (DSP) with the very long instruction word (VLIW) architecture, such as TMS320C6000. The general methods to develop an efficient application for the target processor combine high- and/or low-level programming languages. Although the hardware capabilities of the nowadays processors and compilers are persistently increasing, the programmers common practice is to hand-optimize critical parts of the digital signal processing algorithms in low-level assembly code. In the paper the benefit of the auxiliary tool for generating of semi-optimal codes for the DSP is presented. The functions for basic vector operations (addition, multiplication, and dot product) were proposed by this tool and the computing performances were compared to the corresponding functions from the TMS320C6000 DSP Library (DSPLIB). Comparing the functions' duration, the proposed routines achieve the average acceleration of 24 CPU cycles.