Description logic as a common software engineering artifacts language

Pawel Kaplanski
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引用次数: 2

Abstract

Description logic is proposed as a powerful language able to support chosen software engineering process tasks like: requirements engineering, software architecture definition, software design and configuration management. To do this there is presented a correspondence between description logic and UML. Description logic based integrated software engineering process framework is proposed which owing to automatic knowledge inferring systems (reasoners) that are able to preserve logical cohesion in described ontologies, makes full integration of artifacts created by software analyst, designer and programmer, possible. Strong logical connection between these artifacts is useful in other tasks like: reverse engineering or design constraints preservation.
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描述逻辑作为一种通用的软件工程工件语言
描述逻辑被认为是一种强大的语言,能够支持选定的软件工程过程任务,如:需求工程、软件架构定义、软件设计和配置管理。为了做到这一点,在描述逻辑和UML之间呈现了对应关系。提出了基于描述逻辑的集成软件工程过程框架,由于自动知识推理系统(推理器)能够在被描述的本体中保持逻辑内聚,使得由软件分析人员、设计人员和程序员创建的工件完全集成成为可能。这些工件之间的强逻辑连接在其他任务中很有用,例如:逆向工程或设计约束保存。
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