High-performance hardware platform for the square kilomtre array mid correlator & beamformer

Abstract

The ‘TALON’ architecture has been proposed to meet the unprecedented processing requirements and flexibility required for the Square Kilometre Array-Phase-1 (SKA1) Mid telescope, Correlator & Beamformer (Mid. CBF). The high-performance hardware platform of the TALON architecture incorporates two variants of TALON line-replaceable-units (LRUs); TALON-SX and TALON-MX. Each LRU features a single Intel Stratix-10 FPGA, 2 DDR4 DIMM modules, 4 100GE QSFP28 ports and 48 26 Gbps bi-directional optical channels that connect to a custom optical-backplane. Each LRU facilitates up to 7 TMAC/s of processing capability, 512 GB/s of memory bandwidth and 1.648 Tb/s of I/O capacity.