LSI Gigabit Logic In Silicon (An Alternative to GaAs)

Abstract

Advances in military communications are making ever-increasing demands on integrated circuit technology. Many military communication systems require data rates in the gigahertz range. Usually gallium arsenide technology is chosen for these high-speed applications. However, for device counts in excess of 1000 transistors, the defect level is prohibitively high in gallium arsenide circuits. For these applications, High-speed bipolar silicon technology is an excellent if not the only choice available. This paper presents a design and process for a silicon LSI circuit that is capable of data rates in excess of 1.8 Gigahertz and a divide by 2 circuit that operates at 3.9 Gigahertz. The LSI chip consists of a common building block, used in military communication systems, replicated 16 times, to demonstrate both yield and speed. The wafer fabrication process is the Radiation-Hard, Oxide-Walled, Self-Aligned Emitter (ROSE) process.