A functional model of clocked microarchitectures

MICRO 22 Pub Date : 1989-08-01 DOI:10.1145/75362.75420
C. Charlton, D. Jackson, P. Leng
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引用次数: 2

Abstract

Models for the simulation of computer systems at the microarchitectural level are widely used to assist in design analysis and verification, and the development of microcode. The general model we describe here represents the behaviour of a clocked microarchitecture through the application of functions to component states and signal values. The operational semantics of the model are based partly on data flow and partly on graph reduction, allowing use to be made of the concept of 'lazy' evaluation to aid efficient simulation.
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时钟微架构的功能模型
微体系结构层面的计算机系统仿真模型被广泛用于辅助设计分析和验证以及微代码的开发。我们在这里描述的一般模型通过将函数应用于组件状态和信号值来表示时钟微架构的行为。模型的操作语义部分基于数据流,部分基于图约简,允许使用“懒惰”评估的概念来帮助有效的模拟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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