Motivating future interconnects: a differential measurement analysis of PCI latency

David J. Miller, P. Watts, A. Moore
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引用次数: 32

Abstract

Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and packaging mean that further advances will require a new approach to interconnect design. Although latency in networks has been the focus of the High-Performance Computing architect and of concern across the computer community, we illustrate how an evolution in the common PCI interconnect architecture has worsened latency by a factor of between 3 and 25 over earlier incarnations.
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激励未来互连:PCI延迟的差分测量分析
本地互连体系结构正处于一个转折点,在这个转折点上,吞吐量的提高是以功耗和延迟为代价的。此外,对耗散和封装施加的物理限制意味着进一步的进步将需要一种新的互连设计方法。尽管网络中的延迟一直是高性能计算架构师关注的焦点,也是整个计算机社区关注的焦点,但我们将说明公共PCI互连体系结构的演变如何使延迟比早期的版本恶化了3到25倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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