{"title":"New architectures for optical packet switching using QD-SOAs for multi-wavelength buffering","authors":"K. Vlachos, W. Kabaciński, S. Wêclewski","doi":"10.1109/HSPR.2008.4734424","DOIUrl":null,"url":null,"abstract":"We present two architectures for implementing optical buffers. Both use multi-wavelength selective elements like quantum dot semiconductor optical amplifiers (QD-SOAs) as multi-wavelength converters and fixed-length delay lines that are combined to form both an output queuing and a parallel buffer switch design. The output queuing buffer design requires less active devices (QD-SOA) when implementing large buffers, but the parallel buffer design becomes more profitable, when the number of wavelength channels that can be simultaneously processed by the wavelength selective switches (QD-SOAs) increases. This is because the number of active devices depends only on the buffer size. We also proposed scheduling algorithm to resolve packet contention in parallel buffer architecture and carried out a simulation considering mean packet delay, maximum buffer occupancy and packet loss probability.","PeriodicalId":130484,"journal":{"name":"2008 International Conference on High Performance Switching and Routing","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on High Performance Switching and Routing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HSPR.2008.4734424","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We present two architectures for implementing optical buffers. Both use multi-wavelength selective elements like quantum dot semiconductor optical amplifiers (QD-SOAs) as multi-wavelength converters and fixed-length delay lines that are combined to form both an output queuing and a parallel buffer switch design. The output queuing buffer design requires less active devices (QD-SOA) when implementing large buffers, but the parallel buffer design becomes more profitable, when the number of wavelength channels that can be simultaneously processed by the wavelength selective switches (QD-SOAs) increases. This is because the number of active devices depends only on the buffer size. We also proposed scheduling algorithm to resolve packet contention in parallel buffer architecture and carried out a simulation considering mean packet delay, maximum buffer occupancy and packet loss probability.