Computation and communication aware run-time mapping for NoC-based MPSoC platforms

Abstract

Design-time strategies are suited only for mapping predefined set of applications and thus cannot predict dynamic behavior incurred due to the target applications and state of the platform at run-time. This dynamism demands run-time mapping of application tasks to maintain a critical balance between performance and resource optimization. Any disturbance may either lead to digression from expected performance or complete drain of valuable resources. So, it becomes mandatory to devise algorithms which can intelligently distribute the application tasks among processors taking communication overhead, computation load and resource utilization in consideration. This paper proposes a heuristic that illustrates how to incorporate these factors for mapping multiple tasks onto MPSoC platforms, where communication takes place through a Network-on-Chip. The heuristic attempts to balance the processing load on the platform processing elements (PEs) while reducing communication overhead by mapping highly communicating tasks on the same PE. For MPEG-4 application, the proposed technique reduces total execution time by 33%, resource usage by 37% and energy consumption by 40% when compared to state-of-the-art run-time mapping techniques.