Implementation of high frequency fractional order differentiator

Abstract

In this paper a new approach is suggested for implementing fractional order differentiator in the desired frequency band based on frequency capacitance scaling. The process involves obtaining the rational approximate model of the fractional order differentiator using Matsuda method of approximation and then decomposing it by partial fraction expansion to obtain the circuit parameters (resistance and capacitance). If the frequency band of interest has now to be changed, only the capacitances of the resulting circuit are scaled proportionately. For the choice of the method of approximation and the approach for synthesis, emphasis has been given to accuracy of the model obtained and positive values of resistances and capacitances. The simulations have been performed using OrCAD Capture CIS simulator.