Very low forward drop JBS rectifiers fabricated using submicron technology

M. Mehrotra, B. J. Baliga
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引用次数: 30

Abstract

Summary form only given. The impact of using submicron technology (0.5- mu m design rules) on JBS (junction barrier controlled Schottky) rectifiers is examined. Two-dimensional numerical simulations demonstrate that decreasing P/sup +/-junction width and depth improves the on-state voltage drop. This is due to the improved utilization of the active area for the Schottky region and improved spreading of majority carrier current from the Schottky contact. However, a junction depth of less than 0.3 mu m results in an undesirable high electric field at the Schottky interface during reverse bias, leading to barrier height lowering, which produces a large leakage current. A large reduction in the spreading resistance is possible by increasing the N-epitaxial layer doping and by reducing the cell pitch in order to achieve the same pinch-off voltage. However, increasing the doping above 2*10/sup 16/ cm/sup -3/ reduces the breakdown voltage below 25 V (which is required for 5 V power supplies). The simulations showed that, by using a proper choice of N-doping and P/sup +/-linewidth, one can reduce the leakage by one to two orders of magnitude as compared to a conventional Schottky buried diode. Experiments conducted to verify the simulations clearly demonstrate that the use of submicron technology can lead to significant improvement in JBS rectifier characteristics. >
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采用亚微米技术制造的极低正向压差JBS整流器
只提供摘要形式。采用亚微米技术(0.5 μ m设计规则)对JBS(结势垒控制肖特基)整流器的影响进行了研究。二维数值模拟结果表明,减小P/sup +/-结的宽度和深度可以改善导通电压降。这是由于改进了肖特基区有源面积的利用率和改进了来自肖特基触点的多数载流子电流的扩散。然而,结深小于0.3 μ m会导致反偏置过程中肖特基界面处的高电场,导致势垒高度降低,从而产生较大的漏电流。通过增加n -外延层掺杂和减小电池间距以达到相同的引脚电压,可以大幅度降低扩展电阻。然而,增加2*10/sup以上的掺杂16/ cm/sup -3/可降低25 V以下的击穿电压(这是5v电源所需的)。模拟结果表明,与传统的肖特基埋地二极管相比,通过适当选择n掺杂和P/sup +/-线宽,可以减少一到两个数量级的泄漏。为验证模拟结果而进行的实验清楚地表明,使用亚微米技术可以显著改善JBS整流器的特性。>
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