A 0.2 ‒ 1.2GHz Adaptive Bandwidth PLL with Controllable KVCO

Chang-Yu Song, Se-Hyeon Cho, Young-Chan Jang
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Abstract

An adaptive bandwidth phase-locked loop (PLL) that can control the gain (KVCO) of a voltage-controlled oscillator (VCO) is proposed to improve time jitter even with frequency changes in the reference clock of the PLL. The KVCO of the VCO is adaptively controlled according to the frequency of the reference clock by a KVCO controller consisting of a flash analog-to-digital converter. The proposed adaptive bandwidth PLL is designed by using a 55-nm CMOS process with a supply of 1.2 V. When the frequency of the output clock of the PLL is 200 MHz, ωUGB/ωREF is improved from 0.24 to 0.087 by controlling the KVCO. Also, its peak-to-peak time jitter is improved by 47 % from 10.6 ps to 5.54 ps.
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一种具有可控KVCO的0.2 - 1.2GHz自适应带宽锁相环
提出了一种可控制压控振荡器增益(KVCO)的自适应带宽锁相环(PLL),即使锁相环的参考时钟发生频率变化,也能改善锁相环的时间抖动。由flash模数转换器组成的KVCO控制器根据参考时钟的频率自适应控制VCO的KVCO。所提出的自适应带宽锁相环采用55纳米CMOS工艺设计,电源电压为1.2 V。当锁相环输出时钟频率为200 MHz时,通过控制KVCO,将ωUGB/ωREF从0.24提高到0.087。此外,它的峰间时间抖动从10.6 ps提高到5.54 ps,提高了47%。
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