Modular Adder Design based on Reversible Toffoli CLA

Maheshwari A, Gukan V, J. R, K. A
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Abstract

Since reversible computing can lower heat loss and power consumption, it is a more intriguing research area today. Processor power and speed are significantly impacted by adders. Reversible Toffoli gates are used in the suggested structure in place of conventional logic for the look-ahead logic. The suggested structure is given a hybrid variable latency extend, which minimises energy usage without dramatically slowing down speed. Reversible computing necessitates an equal amount of input and output lines. Backward deterministic system is a technique recycled for nanotechnology, inadequate capacity of VLSI design, Photonic computer, and nondeterministic computing. Indicated work shows how a carry look-ahead adder with a reversible Toffoli gate can decrease trash production, gate count, and quantum efficiency in comparison to the current design.
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基于可逆Toffoli CLA的模块化加法器设计
由于可逆计算可以降低热损失和功耗,因此它是当今一个更有趣的研究领域。加法器显著影响处理器的功率和速度。在建议的结构中使用可逆的Toffoli门来代替传统的前瞻性逻辑。建议的结构是一个混合可变延迟扩展,这将最大限度地减少能源使用,而不会显着减慢速度。可逆计算需要等量的输入和输出线。后向确定性系统是一种用于纳米技术、超大规模集成电路设计容量不足、光子计算机和非确定性计算的技术。指示的工作表明,与当前设计相比,具有可逆Toffoli门的进位前瞻加法器如何减少垃圾产生,门计数和量子效率。
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