An efficient digital architecture for character recognition

Abstract

We introduce a new digital neural architecture designed for automatic hand-written characters recognition. The architecture implements a two-layer perceptron off-line trained by conjugate gradient descent algorithm and the final weights are quantized and stored in a RAM. The architecture was developed and tested using the VHDL Alliance 2.0 CAD System simulator: it is easy to implement using standard VLSI technologies and may be used to deal with multi-level inputs.