Evaluating Performance and Scalability of Advanced Accelerator Simulations

Jungmin Lee, Z. Lan, J. Amundson, P. Spentzouris
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Abstract

Advanced accelerator simulations have played a prominent role in the design and analysis of modern accelerators. Given that accelerator simulations are computational intensive and various high-end clusters are available for such simulations, it is imperative to study the performance and scalability of accelerator simulations on different production systems. In this paper, we examine the performance and scaling behavior of a DOE SciDAC funded accelerator simulation package called Synergia on three different TOP500 clusters including an IA32 Linux Cluster, an IA64 Linux Cluster, and a SGI Altix 3700 system. The main objective is to understand the impact of different high-end architectures and message layers on the performance of accelerator simulations. Experiments show that IA32 using single-CPU can provide the best performance and scalability, while SGI Altix and IA32 using dual-CPU do not scale past 128 and 256 CPUs respectively. Our analysis also indicates that the existing accelerator simulations have several performance bottlenecks which prevent accelerator simulations to take full advantage of the capabilities provided by teraflop and beyond systems.
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高级加速器仿真的性能和可扩展性评估
先进的加速器仿真在现代加速器的设计和分析中发挥了突出的作用。考虑到加速器模拟是计算密集型的,并且有各种高端集群可用于此类模拟,研究加速器模拟在不同生产系统上的性能和可扩展性是必要的。在本文中,我们研究了DOE SciDAC资助的加速器仿真包synergy在三个不同的TOP500集群(包括IA32 Linux集群、IA64 Linux集群和SGI Altix 3700系统)上的性能和扩展行为。主要目标是了解不同高端架构和消息层对加速器模拟性能的影响。实验表明,使用单cpu的IA32可以提供最好的性能和可扩展性,而使用双cpu的SGI Altix和IA32分别不能扩展超过128和256个cpu。我们的分析还表明,现有的加速器模拟存在几个性能瓶颈,这些瓶颈阻碍了加速器模拟充分利用teraflop及以上系统提供的功能。
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