J. C. Iglesias-Rojas, F. Gómez-Castañeda, J. Moreno-Cadenas
{"title":"A very low offset voltage operational amplifier using field programmable floating-gate technology","authors":"J. C. Iglesias-Rojas, F. Gómez-Castañeda, J. Moreno-Cadenas","doi":"10.1109/CONIELECOMP.2010.5440804","DOIUrl":null,"url":null,"abstract":"A very low offset voltage operational amplifier that can be field programmable is described. Offset reduction is achieved by programming two floating gate transistors that form an important part of a single-stage folded cascode amplifier. A novel programming method that requires just four additional pins and an LMS algorithm was used. Floating-gate transistors were programmed for a minimum offset voltage of ± 20 ¿V using 1.2 ¿m CMOS process. Programmed operational amplifiers can be used in continuous-time operation for a long period of time without the need of reprogramming. Experimental results show that this offset reduction scheme is a viable approach to low cost precision operational amplifier fabrication.","PeriodicalId":236039,"journal":{"name":"2010 20th International Conference on Electronics Communications and Computers (CONIELECOMP)","volume":"31 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 20th International Conference on Electronics Communications and Computers (CONIELECOMP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CONIELECOMP.2010.5440804","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A very low offset voltage operational amplifier that can be field programmable is described. Offset reduction is achieved by programming two floating gate transistors that form an important part of a single-stage folded cascode amplifier. A novel programming method that requires just four additional pins and an LMS algorithm was used. Floating-gate transistors were programmed for a minimum offset voltage of ± 20 ¿V using 1.2 ¿m CMOS process. Programmed operational amplifiers can be used in continuous-time operation for a long period of time without the need of reprogramming. Experimental results show that this offset reduction scheme is a viable approach to low cost precision operational amplifier fabrication.
介绍了一种可现场编程的极低失调电压运算放大器。通过对构成单级折叠级联放大器重要部分的两个浮栅晶体管进行编程,实现了偏置减小。一种新的编程方法,只需要四个额外的引脚和LMS算法。采用1.2 m CMOS工艺对浮栅晶体管进行编程,使其最小失调电压为±20 V。程控运算放大器可以在不需要重新编程的情况下长时间连续工作。实验结果表明,该方案是制造低成本精密运算放大器的可行方法。