An EHW architecture for the design of unconstrained low-power FIR filters for sensor control using custom-reconfigurable technology

E. F. Stefatos, T. Arslan, D. Keymeulen, I. Ferguson
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引用次数: 9

Abstract

This paper presents a power-optimized evolvable hardware (EHW) architecture that employs custom-reconfigurable technology. It comprises a preliminary research work towards the implementation of filtering circuits associated with the JPL-Boeing micro-machined gyroscope. Our scope is to implement a low-power, autonomously reconfigurable architecture that is tailored for the realization of arbitrary response FIR filters. For the purpose of this paper the hardware substrate comprises a reconfigurable 4/spl times/12 array, which consists of heterogeneous, configurable, arithmetic-logic units (CALUs). The implementation of the design is based on the primitive operator filter (POF) technique in order to evolve all the parts of a filter (unconstrained filter). Furthermore, a hybrid arithmetic approach is employed in order for the architecture to cope with overflow events. The paradigms of both lowpass and highpass filters are produced, using two different strategies of evolution. The obtained results demonstrate the physical characteristics of the reconfigurable substrate and the performance of the genetic algorithm (GA) in successfully designing FIR filters. Finally, the power results of the reconfigurable architecture (RA) are compared with these of the AT6000 series FPGAs and an algorithmically power-optimized, custom reprogrammable FIR core.
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采用自定义可重构技术设计无约束低功耗FIR滤波器的EHW结构
提出了一种采用自定义可重构技术的功率优化演化硬件(EHW)体系结构。它包括对与jpl波音微机械陀螺仪相关的滤波电路实施的初步研究工作。我们的范围是实现一个低功耗,自主可重构的架构,为实现任意响应FIR滤波器量身定制。为了本文的目的,硬件衬底包括一个可重构的4/spl次/12阵列,该阵列由异构的、可配置的算术逻辑单元(calu)组成。该设计的实现基于原始算子滤波器(POF)技术,以进化滤波器的所有部分(无约束滤波器)。此外,为了处理溢出事件,采用了一种混合算法。使用两种不同的进化策略,产生了低通和高通滤波器的范式。所得结果证明了可重构基板的物理特性和遗传算法在FIR滤波器设计中的成功性能。最后,将可重构架构(RA)的功耗结果与AT6000系列fpga和算法优化的自定义可重构FIR核心的功耗结果进行了比较。
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