A three-port nRERL register file for ultra-low-energy applications

Abstract

In this paper, we propose an adiabatic register file for ultra-low-energy applications, which uses a new reversible adiabatic logic, nRERL. The nRERL register file discards garbage information with minimal energy dissipation. We designed a 16/spl times/8b three-port nRERL register file. From SPICE simulations, we found that the nRERL register file consumes less than 10% of the energy consumed in the conventional register file at a frequency of lower than 1 MHz. We also describe how to design a RAM, a large array of storage cells.