A 0.6V 86.5dB-DR 40kHz-BW Inverter-Based Continuous-Time Delta-Sigma Modulator with PVT-Robust Body-Biasing Technique

Abstract

This paper presents a body-biasing technique for an energy-efficient inverter-based integrator that significantly improves the PVT robustness of the integrators in sub-1V continuous-time delta-sigma modulators (CTDSMs). A prototype CTDSM with the body-biasing technique is implemented in a 28 nm CMOS process and achieves 83 dB SNDR, 84 dB SNR, and 86.5 dB DR in a 40-kHz bandwidth, while consuming only 33.6 μW from a 0.6 V supply. It achieves a Schreier FoM of 177.3 dB.