Design of ternary logic circuits using CNTFET

Debaprasad Das, A. Banerjee, Vikash Prasad
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引用次数: 23

Abstract

The work in this paper presents the design of ternary logic circuits using MOSFET-like carbon nanotube field effect transistor (CNTFET). The ternary logic is one of multivalued logic circuits which is the best substitute for traditional binary logic because of its low power consumption and low power delay product (PDP) resulting from reduced complexity of interconnects and chip area. CNTFET is preferred over Si-MOSFET for logic design due to its excellent thermal, mechanical and electrical properties. In addition, CNTFETs have the capability of having the desired threshold voltage by changing the diameters of the nanotubes, which make them a very suitable device for voltage mode multiple threshold circuit design. In this paper, we have shown how the ternary logic circuits can be efficiently designed using CNTFETs. The chirality of the carbon nanotube (CNT) is varied to vary the diameter of the CNT and hence the threshold voltage of the CNTFET. We have designed a ternary multiplier using CNTFETs at 32nm technology node. Our design shows ∼ 2000 × less delay and 104× less power as compared to that of existing designs.
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利用CNTFET设计三元逻辑电路
本文采用类mosfet的碳纳米管场效应晶体管(CNTFET)设计了三元逻辑电路。三值逻辑电路是一种多值逻辑电路,由于其低功耗和低延迟积(PDP),减少了互连的复杂性和芯片面积,是传统二进制逻辑电路的最佳替代品。由于其优异的热、机械和电气性能,CNTFET比Si-MOSFET更适合逻辑设计。此外,cntfet具有通过改变纳米管直径获得所需阈值电压的能力,这使其成为电压模式多阈值电路设计的非常合适的器件。在本文中,我们展示了如何有效地利用cntfet设计三元逻辑电路。碳纳米管(CNT)的手性随碳纳米管直径的变化而变化,从而改变cntet的阈值电压。我们在32nm技术节点上使用cntfet设计了一个三元倍增器。与现有设计相比,我们的设计可以减少~ 2000倍的延迟和104倍的功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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