{"title":"A 0.65V, Ultra Low-Power CMOS Ultra-Wideband Low Noise Amplifier using Forward Body-Biasing for Biomedical Applications","authors":"Mohammed Adel, Usama Sayed, K. Yousef","doi":"10.1109/JAC-ECC56395.2022.10043962","DOIUrl":null,"url":null,"abstract":"An Ultra low-power ultra-wideband low noise amplifier (UWB-LNA) is presented in this paper. The proposed LNA utilizes a common gate input stage followed by a common source stage acting as an output stage (CGCS) in a current reuse configuration. Forward Body-Biasing (FBB) technique is adopted for ultra low-power dissipation. The design achieves high post-layout gain with a maximum of 12.5 dB and a minimum post-layout noise Figure of 3.9 dB. The proposed design drives only 1.68 mA from a 0. 65V power supply. Within the UWB frequency spectrum of interest, the input and output return loss are less than-10 dB and -6dB, respectively. This LNA circuit is designed and simulated in 130nm CMOS Technology.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JAC-ECC56395.2022.10043962","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An Ultra low-power ultra-wideband low noise amplifier (UWB-LNA) is presented in this paper. The proposed LNA utilizes a common gate input stage followed by a common source stage acting as an output stage (CGCS) in a current reuse configuration. Forward Body-Biasing (FBB) technique is adopted for ultra low-power dissipation. The design achieves high post-layout gain with a maximum of 12.5 dB and a minimum post-layout noise Figure of 3.9 dB. The proposed design drives only 1.68 mA from a 0. 65V power supply. Within the UWB frequency spectrum of interest, the input and output return loss are less than-10 dB and -6dB, respectively. This LNA circuit is designed and simulated in 130nm CMOS Technology.
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