A new approach towards realization of reconfigurable interconnection networks

Abstract

A new approach to realize a reconfigurable interconnection network which is the key factor in constructing reconfigurable parallel computers, utilizing the reconfigurability features of a field programmable gate array (FPGA), is presented. The organization of the reconfigurable interconnection network and the mapping strategy for static and dynamic networks are discussed. Mapping examples are included. The control mechanism and interface that make it possible to implement the optimum interconnection topologies for interprocessor communication patterns on the interconnection network for the efficient execution of application programs on a multiprocessor system are outlined. The system organization of a reconfigurable interconnection network for a massively parallel multiprocessor is described.<>