{"title":"SI and design considerations for Gbps PCBs in communication systems","authors":"Z. Mu, K. Willis","doi":"10.1109/EPEP.2001.967665","DOIUrl":null,"url":null,"abstract":"This paper covers the board level signal integrity issues at Gbps rates, impact of pre-emphasis, interconnect design considerations, and plane configuration techniques for power delivery. Pre-defined rules can be drawn from the discussion to guide high speed board designs.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2001.967665","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper covers the board level signal integrity issues at Gbps rates, impact of pre-emphasis, interconnect design considerations, and plane configuration techniques for power delivery. Pre-defined rules can be drawn from the discussion to guide high speed board designs.
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