{"title":"Analysis and implementation of a priority knockout switch","authors":"Joseph B. Evans, Edgardo Duron, Yizhen Wang","doi":"10.1109/INFCOM.1993.253370","DOIUrl":null,"url":null,"abstract":"A priority knockout switch (PKS) architecture using priority based congestion control mechanisms is presented for broadband ISDN (BISDN) networks. This architecture provides the capability of assigning qualities of service to connections through per cell or virtual circuit priority mechanisms. Performance studies that use an analytical model for uniform traffic and simulation models for uniform and bursty traffic are presented. These studies indicate that the PKS architecture provides excellent cell loss rates for high priority traffic at minor expense to the low priority traffic. CMOS implementations of the switch modules that demonstrate the feasibility of the architecture are described.<<ETX>>","PeriodicalId":166966,"journal":{"name":"IEEE INFOCOM '93 The Conference on Computer Communications, Proceedings","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE INFOCOM '93 The Conference on Computer Communications, Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INFCOM.1993.253370","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A priority knockout switch (PKS) architecture using priority based congestion control mechanisms is presented for broadband ISDN (BISDN) networks. This architecture provides the capability of assigning qualities of service to connections through per cell or virtual circuit priority mechanisms. Performance studies that use an analytical model for uniform traffic and simulation models for uniform and bursty traffic are presented. These studies indicate that the PKS architecture provides excellent cell loss rates for high priority traffic at minor expense to the low priority traffic. CMOS implementations of the switch modules that demonstrate the feasibility of the architecture are described.<>