An 8-PSK Super Regenerative Receiver with new phase detection technique

Abstract

This paper presents a new 8-PSK Super Regenerative Receiver operating in 402–405 MHz MICS band. The proposed topology employs minimum components to design phase detection engine. The receiver utilizes a combined Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) for current reuse purpose and a digital phase detection engine that extracts modulated phase information, via Latches and D-Flip-flops. The receiver is designed and simulated in 130 nm CMOS process and the whole circuit's power consumption is 119µW for the input of −80dBm at the rate of 6 Mbps with Energy Per Bit of 19.8 pj/b.