iAPX 286 microarchitecture to maximize performance

Abstract

Designers of previous generations of microprocessors have relied heavily on ever higher clock frequencies in order to provide increased throughput. As successive generations of microprocessors become more and more optimized, it becomes necessary to increase the use of parallelism and pipelining in order to realize significant increases in throughput. The internal circuitry of the iAPX 286 is organized in such a way that throughput is significantly increased even though major functional enhancements, which would normally be expected to reduce throughput, are also implemented.