Resistive Degeneration Linearization Dynamic Residue Amplifiers for Pipelined ADCs

Abstract

Residue amplifier is a crucial part of a pipelined ADC design. The linearity of the residue amplifier directly affects the linearity of the pipelined ADC. This paper introduces the resistive degeneration linearization technique into dynamic residue amplifier designs. Both NMOS and CMOS dynamic amplifiers are implemented and simulated with a 28nm CMOS technology at 100MS/s. The simulation results show over -77dB THD for both dynamic amplifiers with large output swings after a foreground calibration.