Exploring Kriging for Fast and Accurate Design Optimization of Nanoscale Analog Circuits

Abstract

The increasing complexity of modern electronic devices driven by consumer demand and technological advancements presents significant challenges for designers. The reduced feature size and increased capabilities lead to more complex designs as more sub-systems are packed into a single chip. Traditional synthesis and optimization methods which involve CAD tools for accurate simulation are computationally time expensive and even become infeasible especially in designs using nanoelectronic technology due to increased design factors and the exponentially increasing design space. The current objective is to explore techniques that produce optimal designs while reducing the design effort. Metamodeling techniques have been used in this respect to reduce the cost of manual iterative circuit sizing during synthesis. Existing metamodeling techniques however are unable to capture the effects of process variation which are dominant in deep nanometer regions. This work explores Kriging techniques for fast and accurate design optimization of nanoscale analog circuits.