{"title":"Design of low-power baseband-processor for RFID tag","authors":"He Yan, Jianyun Hu, Li Qiang, Hao Min","doi":"10.1109/SAINT-W.2006.15","DOIUrl":null,"url":null,"abstract":"This paper analyzes the power consumption of an RFID tag and presents a new architecture of a low-power baseband-processor for this special passive tag. The tag consists of a power reception system, an emitter/receiver analog module, an EEPROM and a low-power baseband-processor, compatible with the newest EPCtrade C1G2 UHF RFID protocol. Meanwhile some novel and advanced low-power technologies are adopted for the special low-power baseband-processor, which not only implements the anti-collision schemes and authorization scheme, but also executes read/write operation to EEPROM. The chip was designed and fabricated using 0.35 mum 3 metal layers CMOS technology successfully","PeriodicalId":297153,"journal":{"name":"International Symposium on Applications and the Internet Workshops (SAINTW'06)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Applications and the Internet Workshops (SAINTW'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SAINT-W.2006.15","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38
Abstract
This paper analyzes the power consumption of an RFID tag and presents a new architecture of a low-power baseband-processor for this special passive tag. The tag consists of a power reception system, an emitter/receiver analog module, an EEPROM and a low-power baseband-processor, compatible with the newest EPCtrade C1G2 UHF RFID protocol. Meanwhile some novel and advanced low-power technologies are adopted for the special low-power baseband-processor, which not only implements the anti-collision schemes and authorization scheme, but also executes read/write operation to EEPROM. The chip was designed and fabricated using 0.35 mum 3 metal layers CMOS technology successfully
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