Realization of Multi-port SDRAM Controller in LXI Data Acquisition System

Abstract

Currently, the LXI data acquisition system often requires high speed, large capacity memory, but the internal storage resource of FPGA is not sufficient to meet the requirements. In order to solve above problems, a SDRAM controller is proposed in this paper, where the Multiple FIFO based on the on-chip resources of FPGA serves as the read and write cache to realize the multiple functional modules performing the read/write operation in LXI acquisition system by the design of priority algorithm and reasonable controlling the access of SDRAM from external device. At the same time, the SDRAM can still communicate at high frequency by the suitable time limitation. The simulation results show that the proposed SDRAM controller can not only realize reading and writing data, but also its operating frequency is able to meet the requirements of functional modules.