Segmental transmission line: Its practical application the optimized PCB trace design using a genetic algorithm

M. Yasunaga, H. Shimada, K. Seki, I. Yoshihara
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引用次数: 2

Abstract

High signal integrity (SI) is an important aspect of the design of printed circuit boards (PCBs) with clock frequencies in the GHz range. Unfortunately, conventional PCB trace designs based on the matching of characteristic impedances do not work well with GHz digital signals. In order to overcome this difficulty, we previously proposed a novel PCB trace structure, the segmental transmission line (STL), in which the trace design is optimized using genetic algorithms (GAs). In this paper, we apply the STL to high-speed double data rate (DDR) memory-bus systems, backplane bus systems for basic servers, and high-density trace bus systems. We show that the performance of the STL on those real world applications has high SI by using real measurements on their prototypes.
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分段传输线:其实际应用是利用遗传算法优化PCB走线设计
高信号完整性(SI)是时钟频率在GHz范围内的印刷电路板(pcb)设计的一个重要方面。不幸的是,传统的基于特征阻抗匹配的PCB走线设计不适用于GHz数字信号。为了克服这一困难,我们之前提出了一种新的PCB走线结构,分段传输线(STL),其中走线设计使用遗传算法(GAs)进行优化。在本文中,我们将STL应用于高速双数据速率(DDR)存储总线系统、基本服务器的背板总线系统和高密度的跟踪总线系统。通过对这些实际应用的原型进行实际测量,我们表明STL在这些实际应用中的性能具有很高的SI。
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