Statistical approach for improving manufacturing yield in advanced IC fabrication

Abstract

The methods of planned experimentation, statistical error propagation, multi-vari and Pareto are discussed in terms of scaled-high-voltage analog BiMOS technology and advanced analog IC manufacturing. Applications of statistical techniques using response surface methodology, planned experimentation, statistical-error propagation, multi-vari and Pareto analysis are shown to enhance the definition, optimization, and resolution of complex processing and device problems. The multidisciplinary approach, which involves statistics, device physics, process characterization, device characterization, and manufacturing, plays a major role in the introduction of new IC technology and yield improvements in IC products. The case studies presented demonstrate the essential need for a statistical approach to solve complex IC manufacturing problems.<>