Generation of a multilevel SPWM technique of 3, 9 and 21 levels with FPGAs

Abstract

This paper deals with the implementation of parallel processing SPWM multilevel techniques through programmable gate arrays (Field Programmable Gate Arrays, FPGAs). It is shown that switching losses in power converters significantly decreases with an increased number of levels in the SPWM signal, thus providing an efficient energy transfer. The multilevel SPWM control response of 3, 9 and 21 levels in VHDL through the FPGA Xilinx Spartan family is illustrated.