Haixin Du, Jiankui Zhang, Shihao Sha, Cai Ye, Qiuming Luo
{"title":"The Library for Hadoop Deflate Compression Based on FPGA Accelerator with Load Balance","authors":"Haixin Du, Jiankui Zhang, Shihao Sha, Cai Ye, Qiuming Luo","doi":"10.1109/PDCAT46702.2019.00056","DOIUrl":null,"url":null,"abstract":"Hadoop application will produce lots of intermediate results in the map/reduce process that requires disk I/O and network transmission. By compressing the large-scale data of intermediate result, it will greatly improve disk access efficiently and reduce program run time. Hardware-accelerated solutions have become more desirable. This paper design a multi-FPGA compression accelerator on the Hadoop platform, and the system performance analysis compared with a software-only solution that mainly uses CPU to processing. The testing programs are zpipe, TestDFSIO and Terasort. In contrast with the software-only solution. The max speedup of zpipe is 6.55X (single FPGA) and 10.24X (dual FPGA), the max speedup of TestDFSIO is 6.28X (single FPGA) and 6.28X (dual FPGA), and the max speedup of Terasort application is up to 3.25X(single FPGA) and 3.35X(dual FPGA).","PeriodicalId":166126,"journal":{"name":"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PDCAT46702.2019.00056","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Hadoop application will produce lots of intermediate results in the map/reduce process that requires disk I/O and network transmission. By compressing the large-scale data of intermediate result, it will greatly improve disk access efficiently and reduce program run time. Hardware-accelerated solutions have become more desirable. This paper design a multi-FPGA compression accelerator on the Hadoop platform, and the system performance analysis compared with a software-only solution that mainly uses CPU to processing. The testing programs are zpipe, TestDFSIO and Terasort. In contrast with the software-only solution. The max speedup of zpipe is 6.55X (single FPGA) and 10.24X (dual FPGA), the max speedup of TestDFSIO is 6.28X (single FPGA) and 6.28X (dual FPGA), and the max speedup of Terasort application is up to 3.25X(single FPGA) and 3.35X(dual FPGA).