A Multi-Phase Time-to-Digital Converter Differential Vernier Ring Oscillator

Abstract

This paper reports the development of an adjustable, Time-to-Digital Converter (TDC) based on two vernier Ring Oscillators (RO). The TDC aims to measure timing in Resistive Plate Chamber (RPC) detector for CMS experiment. Considering previous designs, the contribution from power supply noise and intrinsic transistor noise had been minimizing with differential stages and proper transistor sizing. To reduce the timing resolution and deadtime inherent to Vernier TDC architecture, as many Phase Detector (PD) as possible had been implemented. Such functionality permits to choose whether reducing the dead time or measuring redundantly the start-stop time difference for an improved precision. The prototype TDC fabricated in a 130-nm technology consumes 8.5 mW power under 1.2-V supply. The measurement of this chip shown a timing accuracy of 5.48 ps at a timing resolution of 8 ps for the first data allowed by the first phase detection.