{"title":"Small size class AB amplifier for energy harvesting with ultra low power, high gain, and high CMRR","authors":"Ali Far","doi":"10.1109/ROPEC.2016.7830521","DOIUrl":null,"url":null,"abstract":"A low cost, high gain, and ultra low power rail-to-rail input-output amplifier based in 0.18 micron CMOS is presented, whose size is ∼ 77 um per side. This work's incremental contributions are: First, a small and simple regulated cascode current mirror (RGC) is presented that is composed of a common source amplifier coupled with a diode connected self-cascode (SC). This RGC is incorporated in a standard folded cascode amplifier to boost its gain and modestly increase its high impedance output's operating head room, which is beneficial in the sub 1V power supply (VDD) environments. Second, amplifier's inputs can span to the rails via using two pairs of differential PMOSFETs in parallel, where the secondary pair is DC level shifted by NMOSFETs. As the amplifier's inputs span the rails, a single FET steers the same tail current between the amplifier's primary and secondary input PMOSFET pairs, thereby keeping its transconductance almost constant, considering that the amplifier operates in subthreshold. Montecarlo (MC) and worst case (WC) simulations indicate the following specifications are achievable: VDD minimum ∼ 0.8v; IDD ∼ 260nA; input range rail to rail; offset voltage ∼ 5mV; output range ∼ 25mV from the rails; open loop gain (Av) ∼ 138dB with unity gain bandwidth (fu) ∼ 2MHz and phase margin (PM) ∼ 30 degrees; power supply rejection ratio (PSRR) ∼ −120dB; common mode rejection ratio (CMRR) ∼ −140dB; slew rate (SR) ∼ 1V/ uS; settling time (ts) ∼ 3uS.","PeriodicalId":166098,"journal":{"name":"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ROPEC.2016.7830521","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
A low cost, high gain, and ultra low power rail-to-rail input-output amplifier based in 0.18 micron CMOS is presented, whose size is ∼ 77 um per side. This work's incremental contributions are: First, a small and simple regulated cascode current mirror (RGC) is presented that is composed of a common source amplifier coupled with a diode connected self-cascode (SC). This RGC is incorporated in a standard folded cascode amplifier to boost its gain and modestly increase its high impedance output's operating head room, which is beneficial in the sub 1V power supply (VDD) environments. Second, amplifier's inputs can span to the rails via using two pairs of differential PMOSFETs in parallel, where the secondary pair is DC level shifted by NMOSFETs. As the amplifier's inputs span the rails, a single FET steers the same tail current between the amplifier's primary and secondary input PMOSFET pairs, thereby keeping its transconductance almost constant, considering that the amplifier operates in subthreshold. Montecarlo (MC) and worst case (WC) simulations indicate the following specifications are achievable: VDD minimum ∼ 0.8v; IDD ∼ 260nA; input range rail to rail; offset voltage ∼ 5mV; output range ∼ 25mV from the rails; open loop gain (Av) ∼ 138dB with unity gain bandwidth (fu) ∼ 2MHz and phase margin (PM) ∼ 30 degrees; power supply rejection ratio (PSRR) ∼ −120dB; common mode rejection ratio (CMRR) ∼ −140dB; slew rate (SR) ∼ 1V/ uS; settling time (ts) ∼ 3uS.