J. McDonald, Yong C. Kim, T. Andel, M. A. Forbes, J. McVicar
{"title":"Functional polymorphism for intellectual property protection","authors":"J. McDonald, Yong C. Kim, T. Andel, M. A. Forbes, J. McVicar","doi":"10.1109/HST.2016.7495557","DOIUrl":null,"url":null,"abstract":"Polymorphic gates and circuits have been used in the past to design evolutionary components that can sense the environment. In general, polymorphic gates can change their function based on environmental properties such as temperature and power. In the modern digital logic threat landscape, adversarial reverse engineering and illegal cloning pose two risks for hardware-based applications with embedded intellectual property (IP). In this paper, we implement the concept of functional polymorphism at the design level using realized polygates and consider its application for IP protection in specific digital supply chain settings. We introduce a transformation algorithm for general circuits that utilize polygates to produce variants of a target circuit or component. We provide results of a case study analysis on traditional combinational benchmark circuits and components that illustrates efficacy of the approach for circuit watermarking and the ability to defeat adversarial reverse engineering as part of the supply chain lifecycle.","PeriodicalId":194799,"journal":{"name":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HST.2016.7495557","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
Polymorphic gates and circuits have been used in the past to design evolutionary components that can sense the environment. In general, polymorphic gates can change their function based on environmental properties such as temperature and power. In the modern digital logic threat landscape, adversarial reverse engineering and illegal cloning pose two risks for hardware-based applications with embedded intellectual property (IP). In this paper, we implement the concept of functional polymorphism at the design level using realized polygates and consider its application for IP protection in specific digital supply chain settings. We introduce a transformation algorithm for general circuits that utilize polygates to produce variants of a target circuit or component. We provide results of a case study analysis on traditional combinational benchmark circuits and components that illustrates efficacy of the approach for circuit watermarking and the ability to defeat adversarial reverse engineering as part of the supply chain lifecycle.