{"title":"Prevent Notching For Soi Microstructure Fabrication Using SIO2 Thin Film Technique","authors":"J. Li, Q. Zhang, A. Liu","doi":"10.1142/S1465876303001794","DOIUrl":null,"url":null,"abstract":"A new thin film technique is proposed and demonstrated in this paper to prevent the notching effect on silicon on insulator (SOI) wafer micromachinig. SOI wafer provides decisive features. However, the notching effect or undercutting due to the charges built up at the surface of the buried insulation layer degrades the structures and performances of the devices. In this paper, a thin oxide film is introduced combining with multiple steps of etching to prevent the notching effect. To verify this idea, a mask with trenches from 0.4 to 20 μm was designed and the etching was carried out on SOI wafer with 35 μm device silicon layer. The etching result showed that the approach proposed is very effective on notching effect.","PeriodicalId":331001,"journal":{"name":"Int. J. Comput. Eng. Sci.","volume":"182 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Int. J. Comput. Eng. Sci.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/S1465876303001794","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A new thin film technique is proposed and demonstrated in this paper to prevent the notching effect on silicon on insulator (SOI) wafer micromachinig. SOI wafer provides decisive features. However, the notching effect or undercutting due to the charges built up at the surface of the buried insulation layer degrades the structures and performances of the devices. In this paper, a thin oxide film is introduced combining with multiple steps of etching to prevent the notching effect. To verify this idea, a mask with trenches from 0.4 to 20 μm was designed and the etching was carried out on SOI wafer with 35 μm device silicon layer. The etching result showed that the approach proposed is very effective on notching effect.