{"title":"VLSI IP companies: changing environment and business model","authors":"I.S. Han","doi":"10.1109/IEMC.2002.1038562","DOIUrl":null,"url":null,"abstract":"The emerging new VLSI markets of communications and wireless introduced risks and opportunities in a changing environment. This increased the attractiveness of VLSI IP start-ups to specialize in semiconductor design. The wealthy company has the better leverage to take the risk, while the limitation of start-up easily causes the risk transfer involuntarily to workers or investors. Imposing unnecessary risk on people (worker or investor) becomes the critical barrier to the success. In this paper, the interactive role of management is suggested for the business model of VLSI IP to reduce the risks and uncertainty.","PeriodicalId":355841,"journal":{"name":"IEEE International Engineering Management Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Engineering Management Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMC.2002.1038562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The emerging new VLSI markets of communications and wireless introduced risks and opportunities in a changing environment. This increased the attractiveness of VLSI IP start-ups to specialize in semiconductor design. The wealthy company has the better leverage to take the risk, while the limitation of start-up easily causes the risk transfer involuntarily to workers or investors. Imposing unnecessary risk on people (worker or investor) becomes the critical barrier to the success. In this paper, the interactive role of management is suggested for the business model of VLSI IP to reduce the risks and uncertainty.