Massively Parallel Implementation of a Fast Resource Efficient White Light Interferometry Algorithm

Abstract

In this paper an implementation of a massively parallel white light interferometry algorithm will be presented. In contrast to more common algorithms it not depends on the fast Fourier transform. Using non-equidistant sampling steps is supported and will occur after compression. The algorithm can be applied to variety of target hardware ranging from embedded implementations with limited resources up to desktop computers and higher. It was invented to use the massively parallel architecture of field-programmable gate arrays (FPGA). The approach was proven on the Xilinx Zynq architecture and an x86 high level language implementation. Major improvements compared to more common solutions was the ability to compress the raw data easily while keeping the accuracy despite the limited hardware resources available. Independent of the height of the raw image stack the reconstruction can be solved in constant time.