Non-stop processor field upgrading with layered software architecture

Abstract

Switching systems making up a telecommunications network are faced with a rising performance curve of requirements for coping with a growing diversity of advanced service needs. One effective performance-boosting measure is to upgrade the processor, taking advantage of continual advances in general-purpose microprocessor technology. In the case of a switching node, techniques must be established for upgrading the processor without interrupting normal service. This paper proposes a technique for performing processor upgrades in a system that adopts a layered software architecture aimed at multivendor environment. The effectiveness of this technique is confirmed through application to an actual switching node.