Implementation of GSM and IS-95 equalizers on a reconfigurable architecture for software radio systems

Abstract

In this paper the equalizer requirements for the GSM and IS-95 protocols are presented. Based on the requirements, two equalizers algorithms are chosen as an effective solution for channel effects compensation in the GSM and IS-95 radio systems. The algorithms are then implemented using hardware resources and considering the common structures, a power efficient dynamic reconfigurable architecture is presented. The proposed reconfigurable processor is capable of implementing different filter structures. The equalizer structures for the GSM and IS-95 systems are divided to several cycles and are implemented in the proposed dynamic reconfigurable architecture. It is shown that the architecture can be configured to perform successful equalization of the GSM and IS-95 systems. For this purpose a MATLAB script is used to model the transmitter and the channel. The processor is designed in the 0.18 mum technology and simulation show the average power consumption for GSM and IS-95 system equalizations is 50 mW and 140 mW, respectively.