An area efficient on-chip hybrid voltage regulator

Selçuk Köse, E. Friedman, S. Tarn, Sally Pinzon, B. McDermott
{"title":"An area efficient on-chip hybrid voltage regulator","authors":"Selçuk Köse, E. Friedman, S. Tarn, Sally Pinzon, B. McDermott","doi":"10.1109/ISQED.2012.6187524","DOIUrl":null,"url":null,"abstract":"Experimental results of an active filter based on-chip hybrid voltage converter are described in this paper. The area of the voltage converter is significantly less than the area of a conventional passive filter based DC-DC voltage converter or a low-dropout (LDO) regulator. Hence, the proposed circuit is appropriate for point-of-load voltage regulation for the noise sensitive portions of an integrated circuit. The performance of the circuit has been verified with Cadence Spectre simulations and fabricated with a commercial 110 nm CMOS technology. The area of the voltage regulator is 0.015 mm2 and delivers up to 80 mA of output current. The transient response with no output capacitor ranges from 72 ns to 192 ns. The advantages and disadvantages of an active filter based, conventional switching, linear, and switched capacitor voltage converters are compared. The proposed circuit provides a means for distributing multiple local power supplies across an integrated circuit while maintaining high current efficiency and fast response time within a small area.","PeriodicalId":205874,"journal":{"name":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2012.6187524","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 23

Abstract

Experimental results of an active filter based on-chip hybrid voltage converter are described in this paper. The area of the voltage converter is significantly less than the area of a conventional passive filter based DC-DC voltage converter or a low-dropout (LDO) regulator. Hence, the proposed circuit is appropriate for point-of-load voltage regulation for the noise sensitive portions of an integrated circuit. The performance of the circuit has been verified with Cadence Spectre simulations and fabricated with a commercial 110 nm CMOS technology. The area of the voltage regulator is 0.015 mm2 and delivers up to 80 mA of output current. The transient response with no output capacitor ranges from 72 ns to 192 ns. The advantages and disadvantages of an active filter based, conventional switching, linear, and switched capacitor voltage converters are compared. The proposed circuit provides a means for distributing multiple local power supplies across an integrated circuit while maintaining high current efficiency and fast response time within a small area.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种面积高效的片上混合稳压器
本文介绍了一种基于片上混合电压变换器有源滤波器的实验结果。电压变换器的面积明显小于传统的基于无源滤波器的DC-DC电压变换器或低差(LDO)稳压器的面积。因此,所提出的电路适用于集成电路噪声敏感部分的负载点电压调节。该电路的性能已通过Cadence Spectre仿真验证,并采用商用110纳米CMOS技术制造。电压调节器的面积为0.015 mm2,可提供高达80 mA的输出电流。无输出电容的瞬态响应范围为72ns至192ns。比较了基于有源滤波器、传统开关、线性和开关电容电压变换器的优缺点。所提出的电路提供了一种在集成电路上分布多个本地电源的方法,同时在小区域内保持高电流效率和快速响应时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Automated correction of design errors by edge redirection on High-Level Decision Diagrams A variation and energy aware ILP formulation for task scheduling in MPSoC Chip-package power delivery network resonance analysis and co-design using time and frequency domain analysis techniques Test structure, circuits and extraction methods to determine the radius of infuence of STI and polysilicon pattern density History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1