S. Murai, Hiroo Tsuji, M. Kakinuma, K. Sakaguchi, C. Tanaka
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引用次数: 11
Abstract
The outline of a hierarchical placement procedure utilizing a simple blocking scheme is described with the results of the application to the DSA-MOS gate arrays. Indirect clustering value is introduced for the blocking, i.e. grouping of modules under block size restriction. The system including the procedure has been successfully applied to the design of MOS gate arrays with effectively no manual assistance.
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