Designing Voltage-Frequency Island Aware Power-Efficient NoC through Slack Optimization

Abstract

In network-on-chips (NoCs), power consumption has become the main design constraint. In this paper, we propose a power-efficient network calculus-based (PNC) method to minimize the power consumption of NoC. Based on the slack that a packet can be further delayed in the network without violating its deadline, Our PNC method uses power-gating technique to reduce the active buffer size and uses voltage-frequency scaling technique to reduce the voltage-frequency of each voltage-frequency island. With less active buffer units and lower voltage- frequency, the power consumption of NoC is reduced. Experimental results show that our PNC method can save at most 50% of the total power consumption.