K. Katko, M. Caffey, C. Little, T. Nelson, S. Robinson, D. Roussel-Dupre, Anthony Salazar
{"title":"A remote sensing lab in space","authors":"K. Katko, M. Caffey, C. Little, T. Nelson, S. Robinson, D. Roussel-Dupre, Anthony Salazar","doi":"10.1109/NAECON.2009.5426613","DOIUrl":null,"url":null,"abstract":"Cibola Flight Experiment is a small experimental satellite that hosts a reconfigurable computer payload. The configurable high speed processing unit has the power to do significant data compression and the flexibility to run a wide variety of applications. The reconfigurable computer is made up of networks of radiation tolerant SRAM-based Field Programmable Gate Arrays (FPGAs). The ability to reconfigure provides the flexibility to do a lot of things not usually possible in a space environment. Payload algorithm development continued while the spacecraft was being integrated for launch rather than being frozen months in advance. A library of applications resides on the spacecraft, making theater-specific payload configuration possible. Applications are in an on-going state of development and improvements. This has allowed the project to adjust to spacecraft and payload anomalies, real-world signal environments and a wide range of post-launch needs.","PeriodicalId":305765,"journal":{"name":"Proceedings of the IEEE 2009 National Aerospace & Electronics Conference (NAECON)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2009 National Aerospace & Electronics Conference (NAECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2009.5426613","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Cibola Flight Experiment is a small experimental satellite that hosts a reconfigurable computer payload. The configurable high speed processing unit has the power to do significant data compression and the flexibility to run a wide variety of applications. The reconfigurable computer is made up of networks of radiation tolerant SRAM-based Field Programmable Gate Arrays (FPGAs). The ability to reconfigure provides the flexibility to do a lot of things not usually possible in a space environment. Payload algorithm development continued while the spacecraft was being integrated for launch rather than being frozen months in advance. A library of applications resides on the spacecraft, making theater-specific payload configuration possible. Applications are in an on-going state of development and improvements. This has allowed the project to adjust to spacecraft and payload anomalies, real-world signal environments and a wide range of post-launch needs.