Software pipelining for transport-triggered architectures

MICRO 24 Pub Date : 1991-09-01 DOI:10.1145/123465.123479
J. Hoogerbrugge, H. Corporaal, Hans M. Mulder
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引用次数: 14

Abstract

This paper discusses software pipelining for a new class of architectures that we call transport-triggered. These architectures reduce the interconnection requirements between function units. They also exhibit code scheduling possibilities which are not available in traditional operation-triggered architectures. In addition the scheduling freedom is extended by the use of so-called hybridpipelined function utits. In order to exploit this tleedom, existing scheduling techniques need to be extended. We present a software pipelirtirtg technique, based on Lam’s algorithm, which exploits the potential of !mnsport-triggered architectures. Performance results are presented for several benchmak loops. Depending on the available transport capacity, MFLOP rates may increase significantly as compared to scheduling without the ex~a degrees of freedom. As stated in [5] transport-triggered MOVE architectures have extra irtstxuction scheduling degrees of tkeedom. This paper investigates if and how those extra degrees influence the software pipelining iteration initiation interval. It therefore adapts the existing algorithms for software pipelining as developed by Lam [2]. It is shown that transport-triggering may lead to a significant reduction of the iteration initiation interval and therefore to an increase of the MIPS and/or MFLOPS rate. The remainder of this paper starts with an introduction of the MOVE class of architectures; it clari6es the idea of transporttriggered architectures. Section 3 formulates the software pipelining problem and its algorithmic solution for trrmsport-triggered architectures. Section 4 describes the architecture characteristics and benchmarks used for the measurements. In order to research the influence of the extra scheduling freedom, the algorithm has been applied to the benchmarks under dfierent scheduling disciplines. The next section (5) compares and analysis the measurements. Finally section 6 gives severaf conclusions and indicates further research to be done.
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用于传输触发架构的软件流水线
本文讨论了一类新的架构的软件流水线,我们称之为传输触发。这些体系结构减少了功能单元之间的互连需求。它们还展示了代码调度的可能性,这在传统的操作触发架构中是不可用的。此外,通过使用所谓的混合流水线函数单元,扩展了调度自由度。为了利用这种自由,需要扩展现有的调度技术。我们提出了一种基于Lam算法的软件管道触发技术,该技术利用了mnsport触发架构的潜力。给出了几个基准循环的性能结果。与没有ex~a自由度的调度相比,MFLOP率可能会显著增加,这取决于可用的运输能力。如[5]所述,传输触发的MOVE架构具有额外的构建调度自由度。本文研究了这些额外的度是否以及如何影响软件流水线迭代起始间隔。因此,它采用了Lam[2]开发的现有软件流水线算法。结果表明,传输触发可能导致迭代起始间隔的显著缩短,从而导致MIPS和/或MFLOPS速率的增加。本文的其余部分首先介绍MOVE类架构;它阐明了传输触发架构的思想。第3节阐述了传输触发架构的软件流水线问题及其算法解决方案。第4节描述了用于度量的体系结构特征和基准。为了研究额外调度自由度的影响,将该算法应用于不同调度学科下的基准测试。下一节(5)比较和分析测量结果。最后,第6节给出了几个结论,并指出了进一步的研究工作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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