Design of 4.9 GHz Current starved VCO for PLL and CDR

Abstract

A modified current starved voltage controlled oscillator (VCO) is introduced that uses voltage to current convertor based biasing circuit. The voltage supply fluctuations are reduced at output of this VCO. The frequency range obtained at the output is varying with resistor value. The highest frequency is 4.9 GHz with resistance value of 60K.The output frequency is increasing with control voltage with less noise fluctuations and reduced power of 55uW at output. The phase noise of VCO obtained at output is -144.522dBc/Hz at 1MHz at resistance value of 60K. This VCO is useful in wireless communication such as phase locked loop, clock and data recovery circuits etc. It is designed using 180 nm CMOS technology of cadence virtuoso.